Sitemap

A list of all the posts and pages found on the site. For you robots out there is an XML version available for digesting as well.

Pages

Posts

Future Blog Post

This post will show up by default. To disable scheduling of future posts, edit config.yml and set future: false.

Blog Post number 4

This is a sample blog post. Lorem ipsum I can’t remember the rest of lorem ipsum and don’t have an internet connection right now. Testing testing testing this blog post. Blog posts are cool.

Blog Post number 3

This is a sample blog post. Lorem ipsum I can’t remember the rest of lorem ipsum and don’t have an internet connection right now. Testing testing testing this blog post. Blog posts are cool.

Blog Post number 2

This is a sample blog post. Lorem ipsum I can’t remember the rest of lorem ipsum and don’t have an internet connection right now. Testing testing testing this blog post. Blog posts are cool.

Blog Post number 1

This is a sample blog post. Lorem ipsum I can’t remember the rest of lorem ipsum and don’t have an internet connection right now. Testing testing testing this blog post. Blog posts are cool.

portfolio

projects

B*-Floorplan & FM-Partition

  • Implement a circuit floorplanner based on B*-Tree and fast-SA algorithm with fixed-outline constraint and a circuit partitioner based on FM algorithm.

Domain-Specific Quantum Architecture Optimization [JETCAS22]

  • Propose an architecture optimization framework to boost quantum circuit performance by optimizing connectivity.
  • Demonstrate up to 59% fidelity improvement in simulation by optimizing the heavy-hexagon architecture for QAOA maxcut circuits, and up to 14% improvement on the grid architecture. For the QCNN circuit, architecture optimization improves fidelity by 11% on the heavy-hexagon architecture and 605% on the grid architecture.

OLSQ Acceleration [DAC23]

  • Accelerate SMT-based circuit synthesizer using a succinct formulation, different variable encoding, and efficient optimization techniques.
  • Achieve a 692× speedup over the state-of-the-art optimal layout synthesis for depth optimization and a 6,957x speedup for SWAP optimization.

publications

Compatible Equivalence Checking of X-Valued Circuits

Author: Yu-Neng Wang, Yun-Rong Luo, Po-Chun Chien, Ping-Lun Wang, Hao-Ren Wang, Wan-Hsuan Lin*, Jie-Hong Roland Jiang and Chung-Yang Ric Huang
Published in Proceedings of IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2021

A Bridge-based Compression Algorithm for Topological Quantum Circuits

Author: Chen-Hao Hsu, Wan-Hsuan Lin*, Wei-Hsiang Tseng, and Yao-Wen Chang
Published in Proceedings of ACM/IEEE Design Automation Conference (DAC), 2021

A Bridge-based Compression Algorithm for Topological Quantum Circuits

Author: Wei-Hsiang Tseng, Chen-Hao Hsu, Wan-Hsuan Lin*, and Yao-Wen Chang
Published in IEEE Transactions on Computer-Aided Design of Integrated Circuits ans Systems (TCAD), 2022

Language Equation Solving via Boolean Automata Manipulation [Best paper nomination]

Author: Wan-Hsuan Lin*, Chia-Hsuan Su, and Jie-Hong Roland Jiang
Published in International Workshop on Logic & Synthesis (IWLS), 2022

Domain-Specific Quantum Architecture Optimization

Author: Wan-Hsuan Lin, Bochen Tan, Murphy Yuezhen Niu, Jason Kimko, and Jason Cong
Published in Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS), 2022

Language Equation Solving via Boolean Automata Manipulation

Author: Wan-Hsuan Lin*, Chia-Hsuan Su, and Jie-Hong Roland Jiang
Published in Proceedings of IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2022

Scalable Optimal Layout Synthesis for NISQ Quantum Processors

Author: Wan-Hsuan Lin, Jason Kimko, Bochen Tan, Nikolaj Bjorner, and Jason Cong
Published in Proceedings of ACM/IEEE Design Automation Conference (DAC), 2023

talks

teaching

Algorithms

Undergraduate course, National Taiwan University, Electrical Engineering Department, 2020